Two or more ones X67345


Statement
 

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Design a circuit that receives four inputs and produces one output. The output must be 1 when there are two or more inputs at 1. Otherwise, the output must be 0.

Specification

module two_or_more_ones(a, b, c, d, out);
    input a, b, c, d;
    output out;

Input

  • a, b, c and d are the four inputs.

Output

  • out is the output.

Information
Author
Jordi Cortadella
Language
English
Official solutions
Verilog
User solutions
Verilog