4-input multiplexer X45339


Statement
 

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Design a 4-input multiplexer. It has four input signals (in0-in3) and two selection signals (sel[1:0]). The output must be assigned the input signal corresponding to the selection.

Specification

module mux4(in0, in1, in2, in3, sel, out);
    input in0, in1, in2, in3;
    input [1:0] sel;
    output out;

Hint

Use 2-input multiplexers.

Input

  • in0, in1, in2 and in3 are the inputs of the multiplexer.

  • sel encodes the two selection signals.

Output

  • out is the output of the multiplexer.

Information
Author
Jordi Cortadella
Language
English
Official solutions
Verilog
User solutions
Verilog