Add 7 bits X31534


Statement
 

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Design a circuit that receives 7 inputs and generates a 3-bit output. The output represents the number of ones at the inputs.

Specification

module add7bits(in, out);
   input [6:0] in;
   output [2:0] out;

Hint

Use only full adders.

Input

  • in is the input vector with 7 signals.

Output

  • out is a 3-bit number representing the number of ones at the inputs.

Information
Author
Jordi Cortadella
Language
English
Official solutions
Verilog
User solutions
Verilog