Expect some short downtimes and small glitches during the first week of February.
Bus invert X29475
Design a circuit that inverts the value of an -bit bus. must be a parameter of the circuit with default value 8.
Specification
module bus_invert(in, out);
parameter N=8;
input [N-1:0] in;
output [N-1:0] out;Input
inis the -bit input bus.
Output
outis the -bit inverted value of the bus.
Information
- Author
- Jordi Cortadella
- Language
- English
- Official solutions
- Verilog
- User solutions
- Verilog