Design a sequential circuit with one binary input and one binary
output. The output must be 1 at cycle
when the inputs at cycles
,
and
are 110, otherwise the output must be 0.
module find110(in, out, clk, rst);
input in, clk, rst;
output out;The state machine can be implemented with 3 states.
clk is the clock signal
rst is the synchronous reset signal.
in is the binary input.
out is the output that behaves according to the
specification.