Mod-3 counter

Design a circuit that implements a mod-3 counter, i.e., it outputs the sequence $0\rightarrow 1 \rightarrow 2 \rightarrow 0 \rightarrow 1 \rightarrow 2 \rightarrow \cdots$ .

Specification

module mod3_counter(count, clk, rst);
    input clk, rst;
    output [1:0] count;

Input

clk is the clock signal.
rst is the synchronous reset signal.

Output

count is the 2-bit output of the counter.

Problem information

Author: Jordi Cortadella

Generation: 2026-02-03T12:23:08.948Z